1. Field of the Invention
The field of the invention is that of data processing modules placed in a receiver of a data transmission or emission network, and designed to equalize and recover the time-pulse of the received data, in order to furnish to the following elements of the chain of the receiver a clear signal with a clean and resynchronized clock phase.
The invention applies to any data signal as long as it is received or returned in base band.
In a specific, evidently not limitative, application of the invention, the equalizing device with time-pulse recovery can process signals formed with a multiplexing of data and analog information, such as the television signal transmitted according to the X-MAC standards, and especially D2-MAC. In this case, the device of the invention is transparent for the analog component of the multiplexed signal.
It is known that the transmission or the emission of data on all types of media generates linear and non-linear disturbances. The result is a phenomenon of data overlap, known as intersymbol interference.
Another consequence, not covered in as much detail in the literature but of equal importance, is the difficulty in correctly recovering the time-pulse and therefore the clock phase associated with the data.
It is clear that the time-pulse recovery operation is fundamental for the subsequent processing operations of the signal in the receiver.
Thus, in a received D2-MAC signal, the time-pulse recovery governs a large number of functions of the receiver, such as the fenestration (windowing) of the bursts of data in the multiplex, the digital synchronization of the data signal, as well as the Automatic Gain Control, or also the recovery of the continuous component. In other words, in the absence of time-pulse recovery, no service can be rendered at the reception.
2. Description of the Prior Art
Time-pulse recovery devices are known, such as the one shown in FIG. 1. In these devices, specially adapted to D2-MAC receivers, an analog to digital converter ADC 11 digitizes the received signal 10 under the control of a clock recovery module 12. This module 12 operates for example from the analog signal 10, on a principle of detection of the passages through the zero thresholds of the signal (for. ex.: 0), so as to produce a line at 10.125 MHz corresponding to the frequency of the transmitted duobinary signal.
The digitized signal available at the ADC 11 output is then directed to a time base 13 which provides resynchronization of the received signal on the frame synchro signal 14, for example by means of a shift register cooperating with a comparator and an image stored in the frame synchro. With the time base 13, it is therefore in particular possible to extract the digital bursts from the D2-MAC, for decoding the sound and the data, as well as the other synchro data such as line, frame and/or packet.
Such a circuit, however, has two drawbacks:
first, there may be problems of clock phase synchronization, in case the transmission channel of the signal 10 is strongly disturbed; PA1 on the other hand, the echo phenomenon induces in the transmission channel distortions of its transfer function, which lead in particular to intersymbol interference. PA1 the module of calculation of the filtering coefficients works on a source signal with stable clock phase, which permits optimizing the equalizing operation; PA1 equalizing of the received signal is effected in delayed mode, due to the time of processing, in parallel, the data sampled in the module of calculation of the filtering coefficients; in this manner, the risks of divergence are particularly limited, equalizing a very high frequency signal is made possible, especially in the order of 10 MHz, and temporarily multiplexed signals are easier to process. PA1 a first means of synchronizing a digital train in the received signal; PA1 a second means of fenestration of a digital burst in the received signal, based on the calculation of a time base in a synchronized and equalized digital train, the said device comprising means of selective switching of the said first means of synchronizing or of the second means of fenestration, for the sampling and/or storage control of a digital burst constituting the said data representative of the received signal. PA1 sampling, after digitizing of the received signal, a burst of data in the said digitized signal, so as to form a sequence of simulation of a stable clock frequency by repetition of the said sampled burst; PA1 controlling a digital filter processing the said received digitized signal, by means of a module of calculation of filtering coefficients elaborated from the said sequence of simulation, the said control being effected in delayed mode in relation to the sampling of the data burst; PA1 obtaining a new synchronizing reference, from the analysis of the digitized and filtered received signal, by a time-pulse recovery module; PA1 controlling the sampling fenestration of the data bursts and/or the ADC digitizing the received signal of the said new synchronizing reference. PA1 interruption of the calculation of new filtering coefficients, according to a criterion of crossing a satisfactory equalizing threshold; PA1 Resetting of the filtering coefficients, according to a criterion of crossing a maximum deviation of the operation of the filtering module.
The idea occurred of combating the intersymbol interference by using correctors of the type of a detection module 15 according to the greatest probability using the Viterbi algorithm. Indeed this type of correcting structure makes it generally possible to obtain a gain of 3 dB on the signal to noise ratio, when the processed signal is a clean signal presenting an open eye diagram. In the opposite case, it is found in practice that the efficacy of the Viterbi decoder remains limited in case of disturbance.
An objective of the invention is to provide an equalizing system enabling in particular the received signal to be corrected early, at the reception, so that the limits of "falling out of synchronism" of the receiver are extended. The equalizing device of the invention is compatible with Viterbi decoding systems, but can also be used in the absence of this type of decoder.
The equalizing operation, in a known manner, aims to process the received signal in an equalizing module whose transfer function is closest to the inverse of that of the transmission channel at all times.
Linear distortion correcting devices are known, particularly in the form of a self-adapting equalizer adapting itself to the data signal as described in U.S. Pat. No. 4,696,015. According to that document, the equalizer consists of using an algorithm minimizing the average quadratic error in the received signal, by adjusting filtering coefficients of a digital filter equalizing the received signal. A great number of algorithms can be considered, like those presented in the thesis "design and embodiment of an echo corrector adapted to the emission of data DIDON" (defended on Dec. 9, 1983 before the University of Rennes I by Jacques PALICOT).
From the French patent 88 01641, a self-adapting equalizer is also known that is applicable to the X-MAC type signals, and especially to the ND-MAC signals, consisting of introducing a reference signal in the temporal multiplex of analog image signals and of digital sound signals and of characteristic data of the X-MAC signals, so as to use the reference signal to effect an adaptive equalization at the reception. Equalizing is then effected by using an adaptive transverse filter, fed by the samples of the ND-MAC signal, equipped with means of adaptation of its coefficients by comparison between the reference sequence received at the output of the filter and the stored reference sequence.
Two types of circuit are known enabling an equalizing device to be combined with a time-pulse recovery device, as shown in FIGS. 2 and 3.
Depending on the type of circuit, the time-pulse recovery module 12 samples a digital signal 17 or an analog signal 10 depending on whether it is mounted after (FIG. 2) or before (FIG. 3) of the ADC 11. But, in any case, the equalizer 16 is always placed in cascade behind the ADC 11/time-pulse recovery device 12. As a result, the time-pulse recovery 12 is never effected on the equalized data signal, and therefore does not benefit from the reshaping of the data permitted by the equalizer 16. This represents an important limit of the equalizing systems, for when the clock phase established by the time-pulse recovery device is not stable, equalizing cannot operate.
The objective of the invention is also to overcome these disadvantages of the existing systems.